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Merge pull request #6844 from davidlt/riscv

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Add support for RISC-V 32 & 64 bit
merged-on-behalf-of: Nicholas Wilson <thewilsonator@users.noreply.github.com>
This commit is contained in:
The Dlang Bot 2020-03-29 03:57:54 +02:00 • committed by GitHub
commit b14dfffdcb
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2 changed files with 62 additions and 0 deletions
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2
std/experimental/allocator/building_blocks/region.d
View file

@ -523,6 +523,8 @@ struct InSituRegion(size_t size, size_t minAlign = platformAlignment)
else version (HPPA) enum growDownwards = No.growDownwards;
else version (PPC) enum growDownwards = Yes.growDownwards;
else version (PPC64) enum growDownwards = Yes.growDownwards;
else version (RISCV32) enum growDownwards = Yes.growDownwards;
else version (RISCV64) enum growDownwards = Yes.growDownwards;
else version (MIPS32) enum growDownwards = Yes.growDownwards;
else version (MIPS64) enum growDownwards = Yes.growDownwards;
else version (RISCV32) enum growDownwards = Yes.growDownwards;

60
std/math.d
View file

@ -5736,6 +5736,17 @@ private:
{
assert(false, "Not yet supported.");
}
else version (RISCV_Any)
{
mixin(`
uint result = void;
asm pure nothrow @nogc
{
"frflags %0" : "=r" (result);
}
return result;
`);
}
else
assert(0, "Not yet supported");
}
@ -5758,6 +5769,16 @@ private:
asm nothrow @nogc { ldmxcsr mxcsr; }
}
}
else version (RISCV_Any)
{
mixin(`
uint newValues = 0x0;
asm pure nothrow @nogc
{
"fsflags %0" : : "r" (newValues);
}
`);
}
else
{
/* SPARC:
@ -6098,6 +6119,21 @@ nothrow @nogc:
| inexactException,
}
}
else version (RISCV_Any)
{
enum : ExceptionMask
{
inexactException = 0x01,
divByZeroException = 0x02,
underflowException = 0x04,
overflowException = 0x08,
invalidException = 0x10,
severeExceptions = overflowException | divByZeroException
| invalidException,
allExceptions = severeExceptions | underflowException
| inexactException,
}
}
else version (HPPA)
{
enum : ExceptionMask
@ -6285,6 +6321,10 @@ private:
{
alias ControlState = uint;
}
else version (RISCV_Any)
{
alias ControlState = uint;
}
else version (MIPS_Any)
{
alias ControlState = uint;
@ -6350,6 +6390,17 @@ private:
}
return cont;
}
else version (RISCV_Any)
{
mixin(`
ControlState cont;
asm pure nothrow @nogc
{
"frcsr %0" : "=r" (cont);
}
return cont;
`);
}
else
assert(0, "Not yet supported");
}
@ -6384,6 +6435,15 @@ private:
asm nothrow @nogc { ldmxcsr mxcsr; }
}
}
else version (RISCV_Any)
{
mixin(`
asm pure nothrow @nogc
{
"fscsr %0" : : "r" (newState);
}
`);
}
else
assert(0, "Not yet supported");
}