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std.math: Improve support for AArch64, MIPS and MIPS64

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This commit is contained in:
Martin 2017-12-01 23:11:11 +01:00
parent d5f710c57e
commit a32a8aecbc
1 changed files with 66 additions and 2 deletions
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68
std/math.d
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@ -152,6 +152,8 @@ version (X86) version = X86_Any;
version (X86_64) version = X86_Any; version (X86_64) version = X86_Any;
version (PPC) version = PPC_Any; version (PPC) version = PPC_Any;
version (PPC64) version = PPC_Any; version (PPC64) version = PPC_Any;
version (MIPS) version = MIPS_Any;
version (MIPS64) version = MIPS_Any;
version(D_InlineAsm_X86) version(D_InlineAsm_X86)
{ {
@ -169,7 +171,7 @@ version (StaticallyHaveSSE)
{ {
private enum bool haveSSE = true; private enum bool haveSSE = true;
} }
else else version (X86)
{ {
static import core.cpuid; static import core.cpuid;
private alias haveSSE = core.cpuid.sse; private alias haveSSE = core.cpuid.sse;
@ -4880,6 +4882,18 @@ version(X86_Any)
{ {
version = IeeeFlagsSupport; version = IeeeFlagsSupport;
} }
else version(PPC_Any)
{
version = IeeeFlagsSupport;
}
else version(MIPS_Any)
{
version = IeeeFlagsSupport;
}
else version(AArch64)
{
version = IeeeFlagsSupport;
}
else version(ARM) else version(ARM)
{ {
version = IeeeFlagsSupport; version = IeeeFlagsSupport;
@ -5024,6 +5038,21 @@ struct FloatingPointControl
allExceptions, /// ditto allExceptions, /// ditto
} }
} }
else version(AArch64)
{
enum : ExceptionMask
{
inexactException = 0x1000,
underflowException = 0x0800,
overflowException = 0x0400,
divByZeroException = 0x0200,
invalidException = 0x0100,
severeExceptions = overflowException | divByZeroException
| invalidException,
allExceptions = severeExceptions | underflowException
| inexactException,
}
}
else version(ARM) else version(ARM)
{ {
enum : ExceptionMask enum : ExceptionMask
@ -5055,6 +5084,21 @@ struct FloatingPointControl
| inexactException, | inexactException,
} }
} }
else version(MIPS_Any)
{
enum : ExceptionMask
{
inexactException = 0x0800,
divByZeroException = 0x0400,
overflowException = 0x0200,
underflowException = 0x0100,
invalidException = 0x0080,
severeExceptions = overflowException | divByZeroException
| invalidException,
allExceptions = severeExceptions | underflowException
| inexactException,
}
}
else version (X86_Any) else version (X86_Any)
{ {
enum : ExceptionMask enum : ExceptionMask
@ -5082,6 +5126,18 @@ public:
return true; return true;
else version(PPC_Any) else version(PPC_Any)
return true; return true;
else version(MIPS_Any)
return true;
else version(AArch64)
{
auto oldState = getControlState();
// If exceptions are not supported, we set the bit but read it back as zero
// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/aarch64/fpu/feenablxcpth.c
setControlState(oldState | (divByZeroException & allExceptions));
immutable result = (getControlState() & allExceptions) != 0;
setControlState(oldState);
return result;
}
else version(ARM) else version(ARM)
{ {
auto oldState = getControlState(); auto oldState = getControlState();
@ -5141,7 +5197,11 @@ private:
bool initialized = false; bool initialized = false;
version(ARM) version(AArch64)
{
alias ControlState = uint;
}
else version(ARM)
{ {
alias ControlState = uint; alias ControlState = uint;
} }
@ -5149,6 +5209,10 @@ private:
{ {
alias ControlState = uint; alias ControlState = uint;
} }
else version(MIPS_Any)
{
alias ControlState = uint;
}
else version (X86_Any) else version (X86_Any)
{ {
alias ControlState = ushort; alias ControlState = ushort;