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6a1bc70bd7
Even though this argument design conflates two separate concepts (ABI and hardware/software implementation), I chose to go with it since users are liekly know it from GCC and the combination of softloat operations with hardfloat ABI makes no sense. I didn't implement it for old LLVM versions, as ARM EABI exception handling requires LLVM 3.3+ anyway, without which LDC would be useless anyway.
357 lines
11 KiB
C++
357 lines
11 KiB
C++
//===-- target.cpp --------------------------------------------------------===//
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//
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// LDC – the LLVM D compiler
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//
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// This file is distributed under the BSD-style LDC license. See the LICENSE
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// file for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Note: The target CPU and FP ABI detection logic has been adapted from Clang
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// (Tools.cpp and ToolChain.cpp in lib/Driver, the latter seems to have the
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// more up-to-date version).
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//
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//===----------------------------------------------------------------------===//
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#include "driver/target.h"
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#include "gen/llvmcompat.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "mars.h"
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static std::string getX86TargetCPU(std::string arch,
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const llvm::Triple &triple)
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{
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if (!arch.empty()) {
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if (arch != "native")
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return arch;
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// FIXME: Reject attempts to use -march=native unless the target matches
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// the host.
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//
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// FIXME: We should also incorporate the detected target features for use
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// with -native.
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std::string cpu = llvm::sys::getHostCPUName();
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if (!cpu.empty() && cpu != "generic")
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return cpu;
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}
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// Select the default CPU if none was given (or detection failed).
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bool is64Bit = triple.getArch() == llvm::Triple::x86_64;
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if (triple.isOSDarwin())
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return is64Bit ? "core2" : "yonah";
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// Everything else goes to x86-64 in 64-bit mode.
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if (is64Bit)
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return "x86-64";
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if (triple.getOSName().startswith("haiku"))
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return "i586";
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if (triple.getOSName().startswith("openbsd"))
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return "i486";
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if (triple.getOSName().startswith("bitrig"))
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return "i686";
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if (triple.getOSName().startswith("freebsd"))
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return "i486";
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if (triple.getOSName().startswith("netbsd"))
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return "i486";
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#if LDC_LLVM_VER >= 302
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// All x86 devices running Android have core2 as their common
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// denominator. This makes a better choice than pentium4.
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if (triple.getEnvironment() == llvm::Triple::Android)
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return "core2";
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#endif
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// Fallback to p4.
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return "pentium4";
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}
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static const char *getLLVMArchSuffixForARM(llvm::StringRef CPU)
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{
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return llvm::StringSwitch<const char *>(CPU)
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.Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "v4t")
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.Cases("arm720t", "arm9", "arm9tdmi", "v4t")
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.Cases("arm920", "arm920t", "arm922t", "v4t")
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.Cases("arm940t", "ep9312","v4t")
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.Cases("arm10tdmi", "arm1020t", "v5")
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.Cases("arm9e", "arm926ej-s", "arm946e-s", "v5e")
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.Cases("arm966e-s", "arm968e-s", "arm10e", "v5e")
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.Cases("arm1020e", "arm1022e", "xscale", "iwmmxt", "v5e")
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.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "v6")
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.Cases("arm1176jzf-s", "mpcorenovfp", "mpcore", "v6")
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.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
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.Cases("cortex-a9", "cortex-a15", "v7")
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.Case("cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Case("cortex-m4", "v7em")
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.Case("cortex-a9-mp", "v7f")
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.Case("swift", "v7s")
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.Default("");
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}
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static std::string getARMTargetCPU(std::string arch, const llvm::Triple &triple)
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{
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// FIXME: Warn on inconsistent use of -mcpu and -march.
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llvm::StringRef MArch;
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if (!arch.empty()) {
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// Otherwise, if we have -march= choose the base CPU for that arch.
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MArch = arch;
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} else {
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// Otherwise, use the Arch from the triple.
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MArch = triple.getArchName();
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}
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// Handle -march=native.
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std::string NativeMArch;
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if (MArch == "native") {
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std::string CPU = llvm::sys::getHostCPUName();
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if (CPU != "generic") {
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// Translate the native cpu into the architecture. The switch below will
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// then chose the minimum cpu for that arch.
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NativeMArch = std::string("arm") + getLLVMArchSuffixForARM(CPU);
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MArch = NativeMArch;
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}
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}
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return llvm::StringSwitch<const char *>(MArch)
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.Cases("armv2", "armv2a","arm2")
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.Case("armv3", "arm6")
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.Case("armv3m", "arm7m")
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.Cases("armv4", "armv4t", "arm7tdmi")
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.Cases("armv5", "armv5t", "arm10tdmi")
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.Cases("armv5e", "armv5te", "arm1026ejs")
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.Case("armv5tej", "arm926ej-s")
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.Cases("armv6", "armv6k", "arm1136jf-s")
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.Case("armv6j", "arm1136j-s")
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.Cases("armv6z", "armv6zk", "arm1176jzf-s")
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.Case("armv6t2", "arm1156t2-s")
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.Cases("armv6m", "armv6-m", "cortex-m0")
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.Cases("armv7", "armv7a", "armv7-a", "cortex-a8")
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.Cases("armv7l", "armv7-l", "cortex-a8")
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.Cases("armv7f", "armv7-f", "cortex-a9-mp")
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.Cases("armv7s", "armv7-s", "swift")
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.Cases("armv7r", "armv7-r", "cortex-r4")
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.Cases("armv7m", "armv7-m", "cortex-m3")
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.Cases("armv7em", "armv7e-m", "cortex-m4")
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.Case("ep9312", "ep9312")
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.Case("iwmmxt", "iwmmxt")
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.Case("xscale", "xscale")
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// If all else failed, return the most base CPU LLVM supports.
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.Default("arm7tdmi");
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}
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static FloatABI::Type getARMFloatABI(const llvm::Triple &triple,
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const char* llvmArchSuffix)
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{
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switch (triple.getOS()) {
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case llvm::Triple::Darwin:
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case llvm::Triple::MacOSX:
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case llvm::Triple::IOS: {
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// Darwin defaults to "softfp" for v6 and v7.
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if (llvm::StringRef(llvmArchSuffix).startswith("v6") ||
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llvm::StringRef(llvmArchSuffix).startswith("v7"))
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return FloatABI::SoftFP;
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return FloatABI::Soft;
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}
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case llvm::Triple::FreeBSD:
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// FreeBSD defaults to soft float
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return FloatABI::Soft;
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default:
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switch(triple.getEnvironment()) {
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case llvm::Triple::GNUEABIHF:
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return FloatABI::Hard;
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case llvm::Triple::GNUEABI:
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return FloatABI::SoftFP;
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case llvm::Triple::EABI:
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// EABI is always AAPCS, and if it was not marked 'hard', it's softfp
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return FloatABI::SoftFP;
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case llvm::Triple::Android: {
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if (llvm::StringRef(llvmArchSuffix).startswith("v7"))
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return FloatABI::SoftFP;
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return FloatABI::Soft;
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}
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default:
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// Assume "soft", but warn the user we are guessing.
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return FloatABI::SoftFP;
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}
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}
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}
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llvm::TargetMachine* createTargetMachine(
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std::string targetTriple,
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std::string arch,
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std::string cpu,
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std::vector<std::string> attrs,
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ExplicitBitness::Type bitness,
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FloatABI::Type floatABI,
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llvm::Reloc::Model relocModel,
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llvm::CodeModel::Model codeModel,
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llvm::CodeGenOpt::Level codeGenOptLevel,
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bool genDebugInfo)
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{
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// override triple if needed
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std::string defaultTriple = llvm::sys::getDefaultTargetTriple();
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if (sizeof(void*) == 4 && bitness == ExplicitBitness::M64)
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{
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#if LDC_LLVM_VER >= 301
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defaultTriple = llvm::Triple(defaultTriple).get64BitArchVariant().str();
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#else
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defaultTriple = llvm::Triple__get64BitArchVariant(defaultTriple).str();
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#endif
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}
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else if (sizeof(void*) == 8 && bitness == ExplicitBitness::M32)
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{
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#if LDC_LLVM_VER >= 301
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defaultTriple = llvm::Triple(defaultTriple).get32BitArchVariant().str();
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#else
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defaultTriple = llvm::Triple__get32BitArchVariant(defaultTriple).str();
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#endif
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}
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llvm::Triple triple;
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// did the user override the target triple?
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if (targetTriple.empty())
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{
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if (!arch.empty())
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{
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error("you must specify a target triple as well with -mtriple when using the -arch option");
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fatal();
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}
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triple = llvm::Triple(defaultTriple);
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}
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else
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{
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triple = llvm::Triple(llvm::Triple::normalize(targetTriple));
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}
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// Allocate target machine.
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const llvm::Target *theTarget = NULL;
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// Check whether the user has explicitly specified an architecture to compile for.
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if (arch.empty())
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{
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std::string Err;
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theTarget = llvm::TargetRegistry::lookupTarget(triple.str(), Err);
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if (theTarget == 0)
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{
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error("%s Please use the -march option.", Err.c_str());
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fatal();
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}
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}
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else
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{
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for (llvm::TargetRegistry::iterator it = llvm::TargetRegistry::begin(),
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ie = llvm::TargetRegistry::end(); it != ie; ++it)
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{
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if (arch == it->getName())
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{
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theTarget = &*it;
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break;
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}
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}
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if (!theTarget)
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{
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error("invalid target '%s'", arch.c_str());
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fatal();
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}
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}
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// With an empty CPU string, LLVM will default to the host CPU, which is
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// usually not what we want (expected behavior from other compilers is
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// to default to "generic").
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if (cpu.empty())
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{
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switch (triple.getArch())
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{
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default: break;
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case llvm::Triple::x86:
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case llvm::Triple::x86_64:
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cpu = getX86TargetCPU(arch, triple);
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break;
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case llvm::Triple::arm:
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cpu = getARMTargetCPU(arch, triple);
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break;
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}
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}
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// Package up features to be passed to target/subtarget
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std::string FeaturesStr;
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if (cpu.size() || attrs.size())
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{
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llvm::SubtargetFeatures Features;
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for (unsigned i = 0; i != attrs.size(); ++i)
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Features.AddFeature(attrs[i]);
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FeaturesStr = Features.getString();
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}
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if (floatABI == FloatABI::Default)
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{
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switch (triple.getArch())
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{
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default: // X86, ...
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floatABI = FloatABI::Hard;
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break;
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case llvm::Triple::arm:
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floatABI = getARMFloatABI(triple, getLLVMArchSuffixForARM(cpu));
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break;
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case llvm::Triple::thumb:
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floatABI = FloatABI::Soft;
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break;
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}
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}
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#if LDC_LLVM_VER == 300
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llvm::NoFramePointerElim = genDebugInfo;
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// FIXME: Handle floating-point ABI.
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return theTarget->createTargetMachine(triple.str(), cpu, FeaturesStr,
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relocModel, codeModel);
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#else
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llvm::TargetOptions targetOptions;
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targetOptions.NoFramePointerElim = genDebugInfo;
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switch (floatABI)
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{
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default: llvm_unreachable("Floating point ABI type unknown.");
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case FloatABI::Soft:
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targetOptions.UseSoftFloat = true;
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targetOptions.FloatABIType = llvm::FloatABI::Soft;
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break;
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case FloatABI::SoftFP:
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targetOptions.UseSoftFloat = false;
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targetOptions.FloatABIType = llvm::FloatABI::Soft;
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break;
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case FloatABI::Hard:
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targetOptions.UseSoftFloat = false;
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targetOptions.FloatABIType = llvm::FloatABI::Hard;
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break;
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}
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return theTarget->createTargetMachine(
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triple.str(),
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cpu,
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FeaturesStr,
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targetOptions,
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relocModel,
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codeModel,
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codeGenOptLevel
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);
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#endif
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}
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