mirror of
https://github.com/ldc-developers/ldc.git
synced 2025-05-04 17:11:44 +03:00

Bitrig is now defunct OpenBSD fork. It released 1.0 in 2014 and hasn't had another release since. I'm not sure if LDC officially supports it, just delete an occurence of bitrig from the source.
512 lines
17 KiB
C++
512 lines
17 KiB
C++
//===-- targetmachine.cpp -------------------------------------------------===//
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//
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// LDC – the LLVM D compiler
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//
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// This file is distributed under the BSD-style LDC license. See the LICENSE
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// file for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Note: The target CPU detection logic has been adapted from Clang
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// (Tools.cpp and ToolChain.cpp in lib/Driver, the latter seems to have the
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// more up-to-date version).
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//
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//===----------------------------------------------------------------------===//
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#include "driver/targetmachine.h"
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#include "dmd/errors.h"
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#include "driver/cl_options.h"
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#include "gen/logger.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/Module.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/Host.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/TargetParser.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#if LDC_LLVM_VER >= 700
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#include "gen/optimizer.h"
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#endif
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#ifdef LDC_LLVM_SUPPORTS_MACHO_DWARF_LINE_AS_REGULAR_SECTION
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// LDC-LLVM >= 6.0.1:
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// On Mac, emit __debug_line section in __DWARF segment as regular (non-debug)
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// section, like DMD, to enable file/line infos in backtraces. See
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// https://github.com/dlang/dmd/commit/2bf7d0db29416eacbb01a91e6502140e354ee0ef.
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static llvm::cl::opt<bool, true> preserveDwarfLineSection(
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"preserve-dwarf-line-section",
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llvm::cl::desc("Mac: preserve DWARF line section during linking for "
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"file/line infos in backtraces. Defaults to true."),
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llvm::cl::Hidden, llvm::cl::ZeroOrMore,
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llvm::cl::location(ldc::emitMachODwarfLineAsRegularSection),
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llvm::cl::init(true));
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#endif
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static const char *getABI(const llvm::Triple &triple) {
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llvm::StringRef ABIName(opts::mABI);
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if (ABIName != "") {
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switch (triple.getArch()) {
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case llvm::Triple::arm:
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case llvm::Triple::armeb:
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if (ABIName.startswith("aapcs"))
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return "aapcs";
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if (ABIName.startswith("eabi"))
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return "apcs";
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break;
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case llvm::Triple::mips:
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case llvm::Triple::mipsel:
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case llvm::Triple::mips64:
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case llvm::Triple::mips64el:
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if (ABIName.startswith("o32"))
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return "o32";
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if (ABIName.startswith("n32"))
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return "n32";
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if (ABIName.startswith("n64"))
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return "n64";
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if (ABIName.startswith("eabi"))
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return "eabi";
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break;
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case llvm::Triple::ppc64:
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case llvm::Triple::ppc64le:
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if (ABIName.startswith("elfv1"))
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return "elfv1";
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if (ABIName.startswith("elfv2"))
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return "elfv2";
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break;
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default:
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break;
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}
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warning(Loc(), "Unknown ABI %s - using default ABI instead",
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ABIName.str().c_str());
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}
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switch (triple.getArch()) {
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case llvm::Triple::mips64:
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case llvm::Triple::mips64el:
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return "n32";
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case llvm::Triple::ppc64:
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return "elfv1";
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case llvm::Triple::ppc64le:
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return "elfv2";
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default:
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return "";
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}
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}
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extern llvm::TargetMachine *gTargetMachine;
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MipsABI::Type getMipsABI() {
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// eabi can only be set on the commandline
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if (strncmp(opts::mABI.c_str(), "eabi", 4) == 0)
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return MipsABI::EABI;
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const llvm::DataLayout dl = gTargetMachine->createDataLayout();
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if (dl.getPointerSizeInBits() == 64)
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return MipsABI::N64;
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const auto largestInt = dl.getLargestLegalIntTypeSizeInBits();
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return (largestInt == 64) ? MipsABI::N32 : MipsABI::O32;
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}
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static std::string getX86TargetCPU(const llvm::Triple &triple) {
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// Select the default CPU if none was given (or detection failed).
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// Intel Macs are relatively recent, take advantage of that.
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if (triple.isOSDarwin()) {
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return triple.isArch64Bit() ? "core2" : "yonah";
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}
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// Everything else goes to x86-64 in 64-bit mode.
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if (triple.isArch64Bit()) {
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return "x86-64";
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}
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if (triple.getOSName().startswith("haiku")) {
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return "i586";
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}
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if (triple.getOSName().startswith("openbsd")) {
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return "i486";
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}
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if (triple.getOSName().startswith("freebsd")) {
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return "i486";
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}
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if (triple.getOSName().startswith("netbsd")) {
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return "i486";
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}
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if (triple.getOSName().startswith("openbsd")) {
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return "i486";
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}
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if (triple.getOSName().startswith("dragonfly")) {
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return "i486";
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}
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// All x86 devices running Android have core2 as their common
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// denominator. This makes a better choice than pentium4.
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if (triple.getEnvironment() == llvm::Triple::Android) {
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return "core2";
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// Fallback to p4.
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}
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return "pentium4";
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}
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static std::string getARMTargetCPU(const llvm::Triple &triple) {
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auto defaultCPU = llvm::ARM::getDefaultCPU(triple.getArchName());
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if (!defaultCPU.empty())
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return std::string(defaultCPU);
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// Return the most base CPU with thumb interworking supported by LLVM.
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return (triple.getEnvironment() == llvm::Triple::GNUEABIHF) ? "arm1176jzf-s"
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: "arm7tdmi";
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}
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static std::string getAArch64TargetCPU(const llvm::Triple &triple) {
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auto defaultCPU = llvm::AArch64::getDefaultCPU(triple.getArchName());
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if (!defaultCPU.empty())
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return std::string(defaultCPU);
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return "generic";
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}
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/// Returns the LLVM name of the default CPU for the provided target triple.
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static std::string getTargetCPU(const llvm::Triple &triple) {
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switch (triple.getArch()) {
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default:
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// We don't know about the specifics of this platform, just return the
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// empty string and let LLVM decide.
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return "";
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case llvm::Triple::x86:
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case llvm::Triple::x86_64:
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return getX86TargetCPU(triple);
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case llvm::Triple::arm:
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case llvm::Triple::armeb:
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case llvm::Triple::thumb:
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return getARMTargetCPU(triple);
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case llvm::Triple::aarch64:
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case llvm::Triple::aarch64_be:
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return getAArch64TargetCPU(triple);
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}
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}
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static const char *getLLVMArchSuffixForARM(llvm::StringRef CPU) {
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return llvm::StringSwitch<const char *>(CPU)
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.Case("strongarm", "v4")
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.Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "v4t")
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.Cases("arm720t", "arm9", "arm9tdmi", "v4t")
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.Cases("arm920", "arm920t", "arm922t", "v4t")
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.Cases("arm940t", "ep9312", "v4t")
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.Cases("arm10tdmi", "arm1020t", "v5")
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.Cases("arm9e", "arm926ej-s", "arm946e-s", "v5e")
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.Cases("arm966e-s", "arm968e-s", "arm10e", "v5e")
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.Cases("arm1020e", "arm1022e", "xscale", "iwmmxt", "v5e")
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.Cases("arm1136j-s", "arm1136jf-s", "arm1176jz-s", "v6")
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.Cases("arm1176jzf-s", "mpcorenovfp", "mpcore", "v6")
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.Cases("arm1156t2-s", "arm1156t2f-s", "v6t2")
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "v7")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "v7")
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.Cases("cortex-r4", "cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Case("cortex-m4", "v7em")
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.Case("cortex-a9-mp", "v7f")
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.Case("swift", "v7s")
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.Case("cortex-a53", "v8")
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.Case("krait", "v7")
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.Default("");
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}
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static FloatABI::Type getARMFloatABI(const llvm::Triple &triple,
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const char *llvmArchSuffix) {
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switch (triple.getOS()) {
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case llvm::Triple::Darwin:
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case llvm::Triple::MacOSX:
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case llvm::Triple::IOS: {
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// Darwin defaults to "softfp" for v6 and v7.
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if (llvm::StringRef(llvmArchSuffix).startswith("v6") ||
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llvm::StringRef(llvmArchSuffix).startswith("v7")) {
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return FloatABI::SoftFP;
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}
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return FloatABI::Soft;
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}
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case llvm::Triple::FreeBSD:
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// FreeBSD defaults to soft float
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return FloatABI::Soft;
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default:
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if (triple.getVendorName().startswith("hardfloat"))
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return FloatABI::Hard;
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if (triple.getVendorName().startswith("softfloat"))
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return FloatABI::SoftFP;
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switch (triple.getEnvironment()) {
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case llvm::Triple::GNUEABIHF:
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return FloatABI::Hard;
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case llvm::Triple::GNUEABI:
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return FloatABI::SoftFP;
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case llvm::Triple::EABI:
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// EABI is always AAPCS, and if it was not marked 'hard', it's softfp
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return FloatABI::SoftFP;
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case llvm::Triple::Android: {
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if (llvm::StringRef(llvmArchSuffix).startswith("v7")) {
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return FloatABI::SoftFP;
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}
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return FloatABI::Soft;
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}
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default:
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// Assume "soft".
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// TODO: Warn the user we are guessing.
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return FloatABI::Soft;
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}
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}
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}
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/// Looks up a target based on an arch name and a target triple.
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///
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/// If the arch name is non-empty, then the lookup is done by arch. Otherwise,
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/// the target triple is used.
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///
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/// This has been adapted from the corresponding LLVM 3.2+ overload of
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/// llvm::TargetRegistry::lookupTarget. Once support for LLVM 3.1 is dropped,
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/// the registry method can be used instead.
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const llvm::Target *lookupTarget(const std::string &arch, llvm::Triple &triple,
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std::string &errorMsg) {
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// Allocate target machine. First, check whether the user has explicitly
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// specified an architecture to compile for. If so we have to look it up by
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// name, because it might be a backend that has no mapping to a target triple.
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const llvm::Target *target = nullptr;
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if (!arch.empty()) {
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for (const llvm::Target &T : llvm::TargetRegistry::targets()) {
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if (arch == T.getName()) {
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target = &T;
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break;
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}
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}
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if (!target) {
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errorMsg = "invalid target architecture '" + arch +
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"', see "
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"-version for a list of supported targets.";
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return nullptr;
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}
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// Adjust the triple to match (if known), otherwise stick with the
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// given triple.
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const auto Type = llvm::Triple::getArchTypeForLLVMName(arch);
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if (Type != llvm::Triple::UnknownArch) {
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triple.setArch(Type);
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if (Type == llvm::Triple::x86)
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triple.setArchName("i686"); // instead of i386
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}
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} else {
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std::string tempError;
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target = llvm::TargetRegistry::lookupTarget(triple.getTriple(), tempError);
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if (!target) {
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errorMsg = "unable to get target for '" + triple.getTriple() +
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"', see -version and -mtriple.";
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}
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}
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return target;
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}
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llvm::TargetMachine *
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createTargetMachine(const std::string targetTriple, const std::string arch,
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std::string cpu, const std::string featuresString,
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const ExplicitBitness::Type bitness,
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FloatABI::Type &floatABI,
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llvm::Optional<llvm::Reloc::Model> relocModel,
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#if LDC_LLVM_VER >= 600
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llvm::Optional<llvm::CodeModel::Model> codeModel,
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#else
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llvm::CodeModel::Model codeModel,
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#endif
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const llvm::CodeGenOpt::Level codeGenOptLevel,
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const bool noLinkerStripDead) {
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// Determine target triple. If the user didn't explicitly specify one, use
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// the one set at LLVM configure time.
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llvm::Triple triple;
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if (targetTriple.empty()) {
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triple = llvm::Triple(llvm::sys::getDefaultTargetTriple());
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// We only support OSX, so darwin should really be macosx.
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if (triple.getOS() == llvm::Triple::Darwin) {
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triple.setOS(llvm::Triple::MacOSX);
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}
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// Handle -m32/-m64.
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if (!triple.isArch64Bit() && bitness == ExplicitBitness::M64) {
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triple = triple.get64BitArchVariant();
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} else if (!triple.isArch32Bit() && bitness == ExplicitBitness::M32) {
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triple = triple.get32BitArchVariant();
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if (triple.getArch() == llvm::Triple::ArchType::x86)
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triple.setArchName("i686"); // instead of i386
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}
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} else {
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triple = llvm::Triple(llvm::Triple::normalize(targetTriple));
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}
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// Look up the LLVM backend to use. This also updates triple with the
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// user-specified arch, if any.
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std::string errMsg;
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const llvm::Target *target = lookupTarget(arch, triple, errMsg);
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if (target == nullptr) {
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error(Loc(), "%s", errMsg.c_str());
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fatal();
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}
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// With an empty CPU string, LLVM will default to the host CPU, which is
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// usually not what we want (expected behavior from other compilers is
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// to default to "generic").
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if (cpu.empty() || cpu == "generic") {
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cpu = getTargetCPU(triple);
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if (cpu.empty())
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cpu = "generic";
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}
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// Package up features to be passed to target/subtarget.
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llvm::SmallVector<llvm::StringRef, 8> features;
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// NOTE: needs a persistent (non-temporary) string
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auto splitAndAddFeatures = [&features](llvm::StringRef str) {
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str.split(features, ",", -1, /* KeepEmpty */ false);
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};
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llvm::SubtargetFeatures defaultSubtargetFeatures;
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defaultSubtargetFeatures.getDefaultSubtargetFeatures(triple);
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const std::string defaultSubtargetFeaturesString =
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defaultSubtargetFeatures.getString();
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splitAndAddFeatures(defaultSubtargetFeaturesString);
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splitAndAddFeatures(featuresString);
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// checks if the features include ±<feature>
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auto hasFeature = [&features](llvm::StringRef feature) {
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return std::any_of(
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features.begin(), features.end(),
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[feature](llvm::StringRef f) { return f.substr(1) == feature; });
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};
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// cmpxchg16b is not available on old 64bit CPUs. Enable code generation
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// if the user did not make an explicit choice.
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if (cpu == "x86-64" && !hasFeature("cx16")) {
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features.push_back("+cx16");
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}
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#if LDC_LLVM_VER >= 700 && LDC_LLVM_VER < 800
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// https://bugs.llvm.org/show_bug.cgi?id=38289
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if (isOptimizationEnabled() && (cpu == "x86-64" || cpu == "i686") &&
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!hasFeature("ssse3")) {
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features.push_back("+ssse3");
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}
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#endif
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// Handle cases where LLVM picks wrong default relocModel
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if (!relocModel.hasValue()) {
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if (triple.isOSDarwin()) {
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// Darwin defaults to PIC (and as of 10.7.5/LLVM 3.1-3.3, TLS use leads
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// to crashes for non-PIC code). LLVM doesn't handle this.
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relocModel = llvm::Reloc::PIC_;
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} else if (triple.isOSLinux()) {
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// Modern Linux distributions have their toolchain generate PIC code for
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// additional security
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// features (like ASLR). We default to PIC code to avoid linking issues on
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// these OSes.
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// On Android, PIC is default as well.
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relocModel = llvm::Reloc::PIC_;
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} else {
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// ARM for other than Darwin or Android defaults to static
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switch (triple.getArch()) {
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default:
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break;
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case llvm::Triple::arm:
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case llvm::Triple::armeb:
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case llvm::Triple::thumb:
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case llvm::Triple::thumbeb:
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relocModel = llvm::Reloc::Static;
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break;
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}
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}
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}
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llvm::TargetOptions targetOptions = opts::InitTargetOptionsFromCodeGenFlags();
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if (targetOptions.MCOptions.ABIName.empty())
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targetOptions.MCOptions.ABIName = getABI(triple);
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if (floatABI == FloatABI::Default) {
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switch (triple.getArch()) {
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default: // X86, ...
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floatABI = FloatABI::Hard;
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break;
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case llvm::Triple::arm:
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case llvm::Triple::thumb:
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floatABI = getARMFloatABI(triple, getLLVMArchSuffixForARM(cpu));
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break;
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}
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}
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switch (floatABI) {
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default:
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llvm_unreachable("Floating point ABI type unknown.");
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case FloatABI::Soft:
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features.push_back("+soft-float");
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targetOptions.FloatABIType = llvm::FloatABI::Soft;
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break;
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case FloatABI::SoftFP:
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targetOptions.FloatABIType = llvm::FloatABI::Soft;
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break;
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case FloatABI::Hard:
|
||
targetOptions.FloatABIType = llvm::FloatABI::Hard;
|
||
break;
|
||
}
|
||
|
||
// Right now, we only support linker-level dead code elimination on Linux
|
||
// and FreeBSD using GNU or LLD linkers (based on the --gc-sections flag).
|
||
// The Apple ld on OS X supports a similar flag (-dead_strip) that doesn't
|
||
// require emitting the symbols into different sections. The MinGW ld doesn't
|
||
// seem to support --gc-sections at all.
|
||
if (!noLinkerStripDead && (triple.getOS() == llvm::Triple::Linux ||
|
||
triple.getOS() == llvm::Triple::FreeBSD ||
|
||
triple.getOS() == llvm::Triple::Win32)) {
|
||
targetOptions.FunctionSections = true;
|
||
targetOptions.DataSections = true;
|
||
}
|
||
|
||
#if LDC_LLVM_VER >= 700
|
||
// On Android, we depend on a custom TLS emulation scheme implemented in our
|
||
// LLVM fork. LLVM 7+ enables regular emutls by default; prevent that.
|
||
if (triple.getEnvironment() == llvm::Triple::Android) {
|
||
targetOptions.EmulatedTLS = false;
|
||
targetOptions.ExplicitEmulatedTLS = true;
|
||
}
|
||
#endif
|
||
|
||
const std::string finalFeaturesString =
|
||
llvm::join(features.begin(), features.end(), ",");
|
||
|
||
if (Logger::enabled()) {
|
||
Logger::println("Targeting '%s' (CPU '%s' with features '%s')",
|
||
triple.str().c_str(), cpu.c_str(),
|
||
finalFeaturesString.c_str());
|
||
}
|
||
|
||
return target->createTargetMachine(triple.str(), cpu, finalFeaturesString,
|
||
targetOptions, relocModel, codeModel,
|
||
codeGenOptLevel);
|
||
}
|
||
|
||
ComputeBackend::Type getComputeTargetType(llvm::Module* m) {
|
||
llvm::Triple::ArchType a = llvm::Triple(m->getTargetTriple()).getArch();
|
||
if (a == llvm::Triple::spir || a == llvm::Triple::spir64)
|
||
return ComputeBackend::SPIRV;
|
||
else if (a == llvm::Triple::nvptx || a == llvm::Triple::nvptx64)
|
||
return ComputeBackend::NVPTX;
|
||
else
|
||
return ComputeBackend::None;
|
||
}
|