mirror of
https://github.com/ldc-developers/ldc.git
synced 2025-05-03 16:41:06 +03:00
Removed redundant global.params.cpu field.
Now that we have global.params.targetTriple, the information is only duplicated.
This commit is contained in:
parent
bee0b9eba1
commit
5f3ba41574
13 changed files with 55 additions and 57 deletions
15
dmd/mars.h
15
dmd/mars.h
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@ -140,18 +140,7 @@ the target object file format:
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struct OutBuffer;
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// LDC
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enum ARCH
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{
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ARCHinvalid = llvm::Triple::UnknownArch,
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ARCHx86 = llvm::Triple::x86,
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ARCHx86_64 = llvm::Triple::x86_64,
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ARCHppc = llvm::Triple::ppc,
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ARCHppc_64 = llvm::Triple::ppc64,
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ARCHarm = llvm::Triple::arm,
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ARCHthumb = llvm::Triple::thumb,
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};
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#if IN_LLVM
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enum OUTPUTFLAG
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{
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OUTPUTFLAGno,
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@ -169,6 +158,7 @@ enum OS
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OSFreeBSD = llvm::Triple::FreeBSD,
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OSSolaris = llvm::Triple::Solaris,
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};
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#endif
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typedef unsigned char ubyte;
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@ -191,7 +181,6 @@ struct Param
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#endif
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char vtls; // identify thread local variables
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// KN Start merge conflict
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ARCH cpu; // target CPU
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OS os; // target OS
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bool is64bit; // generate 64 bit code
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bool useDeprecated; // allow use of deprecated features
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@ -276,12 +276,12 @@ void Type::init()
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}
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// set real size and padding
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if (global.params.cpu == ARCHx86)
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if (global.params.targetTriple.getArch() == llvm::Triple::x86)
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{
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REALSIZE = 12;
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REALPAD = 2;
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}
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else if (global.params.cpu == ARCHx86_64)
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else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64)
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{
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REALSIZE = 16;
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REALPAD = 6;
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@ -1175,8 +1175,11 @@ unsigned TypeBasic::alignsize()
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#if IN_LLVM
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unsigned TypeBasic::memalign(unsigned salign)
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{
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if (global.params.cpu == ARCHx86_64 && (ty == Tfloat80 || ty == Timaginary80))
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if (global.params.targetTriple.getArch() == llvm::Triple::x86_64 &&
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(ty == Tfloat80 || ty == Timaginary80))
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{
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return 16;
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}
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return Type::memalign(salign);
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}
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#endif
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12
dmd2/mars.h
12
dmd2/mars.h
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@ -147,17 +147,6 @@ typedef ArrayBase<struct Identifier> Identifiers;
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typedef ArrayBase<char> Strings;
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#if IN_LLVM
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enum ARCH
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{
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ARCHinvalid = llvm::Triple::UnknownArch,
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ARCHx86 = llvm::Triple::x86,
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ARCHx86_64 = llvm::Triple::x86_64,
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ARCHppc = llvm::Triple::ppc,
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ARCHppc_64 = llvm::Triple::ppc64,
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ARCHarm = llvm::Triple::arm,
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ARCHthumb = llvm::Triple::thumb,
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};
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enum OUTPUTFLAG
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{
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OUTPUTFLAGno,
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@ -200,7 +189,6 @@ struct Param
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char optimize; // run optimizer
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#endif
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char map; // generate linker .map file
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ARCH cpu; // target CPU
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bool is64bit; // generate 64 bit code
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#if IN_LLVM
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OS os;
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@ -2923,8 +2923,11 @@ unsigned TypeBasic::alignsize()
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#if IN_LLVM
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unsigned TypeBasic::alignment()
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{
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if (global.params.cpu == ARCHx86_64 && (ty == Tfloat80 || ty == Timaginary80))
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if (global.params.targetTriple.getArch() == llvm::Triple::x86_64 &&
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(ty == Tfloat80 || ty == Timaginary80))
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{
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return 16;
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}
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return Type::alignment();
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}
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#endif
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@ -590,7 +590,6 @@ int main(int argc, char** argv)
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// Starting with LLVM 3.1 we could also use global.params.targetTriple.isArch64Bit();
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global.params.is64bit = gDataLayout->getPointerSizeInBits(ADDRESS_SPACE) == 64;
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global.params.cpu = static_cast<ARCH>(global.params.targetTriple.getArch());
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global.params.os = static_cast<OS>(global.params.targetTriple.getOS());
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switch (global.params.targetTriple.getArch())
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@ -69,13 +69,13 @@ struct UnknownTargetABI : TargetABI
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TargetABI * TargetABI::getTarget()
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{
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switch(global.params.cpu)
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switch (global.params.targetTriple.getArch())
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{
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case ARCHx86:
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case llvm::Triple::x86:
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return getX86TargetABI();
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case ARCHx86_64:
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case llvm::Triple::x86_64:
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return getX86_64TargetABI();
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case ARCHppc_64:
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case llvm::Triple::ppc64:
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return getPPC64TargetABI();
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default:
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Logger::cout() << "WARNING: Unknown ABI, guessing...\n";
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@ -159,9 +159,11 @@ Statement *AsmStatement::semantic(Scope *sc)
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#endif
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bool err = false;
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if ((global.params.cpu != ARCHx86) && (global.params.cpu != ARCHx86_64))
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llvm::Triple const t = global.params.targetTriple;
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if (!(t.getArch() == llvm::Triple::x86 || t.getArch() == llvm::Triple::x86_64))
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{
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error("inline asm is not supported for the \"%s\" architecture", global.params.targetTriple.getArchName().str().c_str());
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error("inline asm is not supported for the \"%s\" architecture",
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t.getArchName().str().c_str());
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err = true;
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}
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if (!global.params.useInlineAsm)
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@ -185,9 +187,9 @@ Statement *AsmStatement::semantic(Scope *sc)
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if (!asmparser)
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{
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if (global.params.cpu == ARCHx86)
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if (t.getArch() == llvm::Triple::x86)
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asmparser = new AsmParserx8632::AsmParser;
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else if (global.params.cpu == ARCHx86_64)
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else if (t.getArch() == llvm::Triple::x86_64)
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asmparser = new AsmParserx8664::AsmParser;
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}
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@ -38,10 +38,16 @@ LLType* DtoComplexBaseType(Type* t)
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case Tcomplex32: return LLType::getFloatTy(gIR->context());
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case Tcomplex64: return LLType::getDoubleTy(gIR->context());
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case Tcomplex80:
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if ((global.params.cpu == ARCHx86) || (global.params.cpu == ARCHx86_64))
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if ((global.params.targetTriple.getArch() == llvm::Triple::x86) ||
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global.params.targetTriple.getArch() == llvm::Triple::x86_64)
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{
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return LLType::getX86_FP80Ty(gIR->context());
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else if (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
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}
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else if (global.params.targetTriple.getArch() == llvm::Triple::ppc ||
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global.params.targetTriple.getArch() == llvm::Triple::ppc64)
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{
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return LLType::getPPC_FP128Ty(gIR->context());
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}
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else
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return LLType::getDoubleTy(gIR->context());
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}
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@ -227,7 +227,7 @@ void emitABIReturnAsmStmt(IRAsmBlock* asmblock, Loc loc, FuncDeclaration* fdecl)
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// It should be able to do this for a greater variety of types.
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// x86
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if (global.params.cpu == ARCHx86)
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if (global.params.targetTriple.getArch() == llvm::Triple::x86)
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{
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LINK l = fdecl->linkage;
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assert((l == LINKd || l == LINKc || l == LINKwindows) && "invalid linkage for asm implicit return");
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@ -301,7 +301,7 @@ void emitABIReturnAsmStmt(IRAsmBlock* asmblock, Loc loc, FuncDeclaration* fdecl)
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}
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// x86_64
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else if (global.params.cpu == ARCHx86_64)
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else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64)
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{
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LINK l = fdecl->linkage;
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/* TODO: Check if this works with extern(Windows), completely untested.
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@ -65,15 +65,22 @@ llvm::CallingConv::ID DtoCallingConv(Loc loc, LINK l)
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{
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//TODO: StdCall is not a good base on Windows due to extra name mangling
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// applied there
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if (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
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return (global.params.os != OSWindows) ? llvm::CallingConv::X86_StdCall : llvm::CallingConv::C;
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if (global.params.targetTriple.getArch() == llvm::Triple::x86 ||
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global.params.targetTriple.getArch() == llvm::Triple::x86_64)
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{
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return (global.params.os != OSWindows) ?
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llvm::CallingConv::X86_StdCall : llvm::CallingConv::C;
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}
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else
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return llvm::CallingConv::Fast;
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}
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// on the other hand, here, it's exactly what we want!!! TODO: right?
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// On Windows 64bit, there is only one calling convention!
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else if (l == LINKwindows)
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return global.params.cpu == ARCHx86_64 ? llvm::CallingConv::C : llvm::CallingConv::X86_StdCall;
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{
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return (global.params.targetTriple.getArch() == llvm::Triple::x86_64) ?
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llvm::CallingConv::C : llvm::CallingConv::X86_StdCall;
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}
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else if (l == LINKpascal)
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return llvm::CallingConv::X86_StdCall;
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else
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@ -92,7 +99,7 @@ DValue* DtoVaArg(Loc& loc, Type* type, Expression* valistArg)
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if (DtoIsPassedByRef(type))
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llt = getPtrToType(llt);
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// issue a warning for broken va_arg instruction.
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if (global.params.cpu != ARCHx86)
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if (global.params.targetTriple.getArch() != llvm::Triple::x86)
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warning(Loc(), "%s: va_arg for C variadic functions is probably broken for anything but x86", loc.toChars());
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// done
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return new DImValue(type, gIR->ir->CreateVAArg(expelem->getLVal(), llt, "tmp"));
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@ -941,7 +941,7 @@ DValue* CallExp::toElem(IRState* p)
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if (LLValue *argptr = gIR->func()->_argptr) {
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DtoStore(DtoLoad(argptr), DtoBitCast(arg, getPtrToType(getVoidPtrType())));
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return new DImValue(type, arg);
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} else if (global.params.cpu == ARCHx86_64) {
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} else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64) {
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LLValue *va_list = DtoAlloca(exp->type->nextOf());
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DtoStore(va_list, arg);
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va_list = DtoBitCast(va_list, getVoidPtrType());
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@ -954,7 +954,8 @@ DValue* CallExp::toElem(IRState* p)
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}
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}
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#if DMDV2
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else if (fndecl->llvmInternal == LLVMva_copy && global.params.cpu == ARCHx86_64) {
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else if (fndecl->llvmInternal == LLVMva_copy &&
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global.params.targetTriple.getArch() == llvm::Triple::x86_64) {
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if (arguments->dim != 2) {
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error("va_copy instruction expects 2 arguments");
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return NULL;
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@ -719,8 +719,8 @@ void TypeInfoStructDeclaration::llvmDefine()
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// On x86_64, class TypeInfo_Struct contains 2 additional fields
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// (m_arg1/m_arg2) which are used for the X86_64 System V ABI varargs
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// implementation. They are not present on any other cpu/os.
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assert((global.params.cpu != ARCHx86_64 && tscd->fields.dim == 11) ||
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(global.params.cpu == ARCHx86_64 && tscd->fields.dim == 13));
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assert((global.params.targetTriple.getArch() != llvm::Triple::x86_64 && tscd->fields.dim == 11) ||
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(global.params.targetTriple.getArch() == llvm::Triple::x86_64 && tscd->fields.dim == 13));
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//void function(void*) xdtor;
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b.push_funcptr(sd->dtor);
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@ -68,6 +68,9 @@ llvm::Type * IrTypeBasic::basic2llvm(Type* t)
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LLType* t2;
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llvm::LLVMContext& ctx = llvm::getGlobalContext();
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llvm::Triple::ArchType const a = global.params.targetTriple.getArch();
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bool const anyX86 = (a == llvm::Triple::x86) || (a == llvm::Triple::x86_64);
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bool const anyPPC = (a == llvm::Triple::ppc) || (a == llvm::Triple::ppc64);
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switch(t->ty)
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{
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@ -110,10 +113,10 @@ llvm::Type * IrTypeBasic::basic2llvm(Type* t)
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case Tfloat80:
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case Timaginary80:
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// only x86 has 80bit float
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if (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
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if (anyX86)
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return llvm::Type::getX86_FP80Ty(ctx);
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// PPC has a special 128bit float
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else if (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
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else if (anyPPC)
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return llvm::Type::getPPC_FP128Ty(ctx);
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// other platforms use 64bit reals
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else
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return getComplexType(ctx, t2);
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case Tcomplex80:
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t2 = (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
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? llvm::Type::getX86_FP80Ty(ctx)
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: (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
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? llvm::Type::getPPC_FP128Ty(ctx)
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: llvm::Type::getDoubleTy(ctx);
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t2 = anyX86 ? llvm::Type::getX86_FP80Ty(ctx)
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: (anyPPC ? llvm::Type::getPPC_FP128Ty(ctx) : llvm::Type::getDoubleTy(ctx));
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return getComplexType(ctx, t2);
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case Tbool:
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