Removed redundant global.params.cpu field.

Now that we have global.params.targetTriple, the information
is only duplicated.

dmd/mars.h

@@ -140,18 +140,7 @@ the target object file format:
 
 struct OutBuffer;
 
-// LDC
+#if IN_LLVM
-enum ARCH
-{
-    ARCHinvalid = llvm::Triple::UnknownArch,
-    ARCHx86 = llvm::Triple::x86,
-    ARCHx86_64 = llvm::Triple::x86_64,
-    ARCHppc = llvm::Triple::ppc,
-    ARCHppc_64 = llvm::Triple::ppc64,
-    ARCHarm = llvm::Triple::arm,
-    ARCHthumb = llvm::Triple::thumb,
-};
-
 enum OUTPUTFLAG
 {
     OUTPUTFLAGno,
@@ -169,6 +158,7 @@ enum OS
     OSFreeBSD = llvm::Triple::FreeBSD,
     OSSolaris = llvm::Triple::Solaris,
 };
+#endif
 
 typedef unsigned char ubyte;
 
@@ -191,7 +181,6 @@ struct Param
 #endif
     char vtls;          // identify thread local variables
 // KN Start merge conflict
-    ARCH cpu;           // target CPU
     OS   os;            // target OS
     bool is64bit;       // generate 64 bit code
     bool useDeprecated; // allow use of deprecated features

dmd/mtype.c

@@ -276,12 +276,12 @@ void Type::init()
     }
 
     // set real size and padding
-    if (global.params.cpu == ARCHx86)
+    if (global.params.targetTriple.getArch() == llvm::Triple::x86)
     {
         REALSIZE = 12;
         REALPAD = 2;
     }
-    else if (global.params.cpu == ARCHx86_64)
+    else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64)
     {
         REALSIZE = 16;
         REALPAD = 6;
@@ -1175,8 +1175,11 @@ unsigned TypeBasic::alignsize()
 #if IN_LLVM
 unsigned TypeBasic::memalign(unsigned salign)
 {
-    if (global.params.cpu == ARCHx86_64 && (ty == Tfloat80 || ty == Timaginary80))
+    if (global.params.targetTriple.getArch() == llvm::Triple::x86_64 &&
+        (ty == Tfloat80 || ty == Timaginary80))
+    {
         return 16;
+    }
     return Type::memalign(salign);
 }
 #endif

dmd2/mars.h

@@ -147,17 +147,6 @@ typedef ArrayBase<struct Identifier> Identifiers;
 typedef ArrayBase<char> Strings;
 
 #if IN_LLVM
-enum ARCH
-{
-    ARCHinvalid = llvm::Triple::UnknownArch,
-    ARCHx86 = llvm::Triple::x86,
-    ARCHx86_64 = llvm::Triple::x86_64,
-    ARCHppc = llvm::Triple::ppc,
-    ARCHppc_64 = llvm::Triple::ppc64,
-    ARCHarm = llvm::Triple::arm,
-    ARCHthumb = llvm::Triple::thumb,
-};
-
 enum OUTPUTFLAG
 {
     OUTPUTFLAGno,
@@ -200,7 +189,6 @@ struct Param
     char optimize;      // run optimizer
 #endif
     char map;           // generate linker .map file
-    ARCH cpu;           // target CPU
     bool is64bit;       // generate 64 bit code
 #if IN_LLVM
     OS   os;

dmd2/mtype.c

@@ -2923,8 +2923,11 @@ unsigned TypeBasic::alignsize()
 #if IN_LLVM
 unsigned TypeBasic::alignment()
 {
-    if (global.params.cpu == ARCHx86_64 && (ty == Tfloat80 || ty == Timaginary80))
+    if (global.params.targetTriple.getArch() == llvm::Triple::x86_64 &&
+        (ty == Tfloat80 || ty == Timaginary80))
+    {
         return 16;
+    }
     return Type::alignment();
 }
 #endif

driver/main.cpp

@@ -590,7 +590,6 @@ int main(int argc, char** argv)
 
     // Starting with LLVM 3.1 we could also use global.params.targetTriple.isArch64Bit();
     global.params.is64bit = gDataLayout->getPointerSizeInBits(ADDRESS_SPACE) == 64;
-    global.params.cpu = static_cast<ARCH>(global.params.targetTriple.getArch());
     global.params.os = static_cast<OS>(global.params.targetTriple.getOS());
 
     switch (global.params.targetTriple.getArch())

gen/abi.cpp

@@ -69,13 +69,13 @@ struct UnknownTargetABI : TargetABI
 
 TargetABI * TargetABI::getTarget()
 {
-    switch(global.params.cpu)
+    switch (global.params.targetTriple.getArch())
     {
-    case ARCHx86:
+    case llvm::Triple::x86:
         return getX86TargetABI();
-    case ARCHx86_64:
+    case llvm::Triple::x86_64:
         return getX86_64TargetABI();
-    case ARCHppc_64:
+    case llvm::Triple::ppc64:
         return getPPC64TargetABI();
     default:
         Logger::cout() << "WARNING: Unknown ABI, guessing...\n";

gen/asmstmt.cpp

@@ -159,9 +159,11 @@ Statement *AsmStatement::semantic(Scope *sc)
 #endif
 
     bool err = false;
-    if ((global.params.cpu != ARCHx86) && (global.params.cpu != ARCHx86_64))
+    llvm::Triple const t = global.params.targetTriple;
+    if (!(t.getArch() == llvm::Triple::x86 || t.getArch() == llvm::Triple::x86_64))
     {
-        error("inline asm is not supported for the \"%s\" architecture", global.params.targetTriple.getArchName().str().c_str());
+        error("inline asm is not supported for the \"%s\" architecture",
+            t.getArchName().str().c_str());
         err = true;
     }
     if (!global.params.useInlineAsm)
@@ -185,9 +187,9 @@ Statement *AsmStatement::semantic(Scope *sc)
 
     if (!asmparser)
     {
-        if (global.params.cpu == ARCHx86)
+        if (t.getArch() == llvm::Triple::x86)
             asmparser = new AsmParserx8632::AsmParser;
-        else if (global.params.cpu == ARCHx86_64)
+        else if (t.getArch() == llvm::Triple::x86_64)
             asmparser = new AsmParserx8664::AsmParser;
     }
 

gen/complex.cpp

@@ -38,10 +38,16 @@ LLType* DtoComplexBaseType(Type* t)
     case Tcomplex32: return LLType::getFloatTy(gIR->context());
     case Tcomplex64: return LLType::getDoubleTy(gIR->context());
     case Tcomplex80:
-        if ((global.params.cpu == ARCHx86) || (global.params.cpu == ARCHx86_64))
+        if ((global.params.targetTriple.getArch() == llvm::Triple::x86) ||
+            global.params.targetTriple.getArch() == llvm::Triple::x86_64)
+        {
             return LLType::getX86_FP80Ty(gIR->context());
-        else if (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
+        }
+        else if (global.params.targetTriple.getArch() == llvm::Triple::ppc ||
+            global.params.targetTriple.getArch() == llvm::Triple::ppc64)
+        {
             return LLType::getPPC_FP128Ty(gIR->context());
+        }
         else
             return LLType::getDoubleTy(gIR->context());
     }

gen/naked.cpp

@@ -227,7 +227,7 @@ void emitABIReturnAsmStmt(IRAsmBlock* asmblock, Loc loc, FuncDeclaration* fdecl)
     //        It should be able to do this for a greater variety of types.
 
     // x86
-    if (global.params.cpu == ARCHx86)
+    if (global.params.targetTriple.getArch() == llvm::Triple::x86)
     {
         LINK l = fdecl->linkage;
         assert((l == LINKd || l == LINKc || l == LINKwindows) && "invalid linkage for asm implicit return");
@@ -301,7 +301,7 @@ void emitABIReturnAsmStmt(IRAsmBlock* asmblock, Loc loc, FuncDeclaration* fdecl)
     }
 
     // x86_64
-    else if (global.params.cpu == ARCHx86_64)
+    else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64)
     {
         LINK l = fdecl->linkage;
         /* TODO: Check if this works with extern(Windows), completely untested.

gen/tocall.cpp

@@ -65,15 +65,22 @@ llvm::CallingConv::ID DtoCallingConv(Loc loc, LINK l)
     {
         //TODO: StdCall is not a good base on Windows due to extra name mangling
         // applied there
-        if (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
+        if (global.params.targetTriple.getArch() == llvm::Triple::x86 ||
-            return (global.params.os != OSWindows) ? llvm::CallingConv::X86_StdCall : llvm::CallingConv::C;
+            global.params.targetTriple.getArch() == llvm::Triple::x86_64)
+        {
+            return (global.params.os != OSWindows) ?
+                llvm::CallingConv::X86_StdCall : llvm::CallingConv::C;
+        }
         else
             return llvm::CallingConv::Fast;
     }
     // on the other hand, here, it's exactly what we want!!! TODO: right?
     // On Windows 64bit, there is only one calling convention!
     else if (l == LINKwindows)
-        return global.params.cpu == ARCHx86_64 ? llvm::CallingConv::C : llvm::CallingConv::X86_StdCall;
+    {
+        return (global.params.targetTriple.getArch() == llvm::Triple::x86_64) ?
+            llvm::CallingConv::C : llvm::CallingConv::X86_StdCall;
+    }
     else if (l == LINKpascal)
         return llvm::CallingConv::X86_StdCall;
     else
@@ -92,7 +99,7 @@ DValue* DtoVaArg(Loc& loc, Type* type, Expression* valistArg)
     if (DtoIsPassedByRef(type))
         llt = getPtrToType(llt);
     // issue a warning for broken va_arg instruction.
-    if (global.params.cpu != ARCHx86)
+    if (global.params.targetTriple.getArch() != llvm::Triple::x86)
         warning(Loc(), "%s: va_arg for C variadic functions is probably broken for anything but x86", loc.toChars());
     // done
     return new DImValue(type, gIR->ir->CreateVAArg(expelem->getLVal(), llt, "tmp"));

gen/toir.cpp

@@ -941,7 +941,7 @@ DValue* CallExp::toElem(IRState* p)
             if (LLValue *argptr = gIR->func()->_argptr) {
                 DtoStore(DtoLoad(argptr), DtoBitCast(arg, getPtrToType(getVoidPtrType())));
                 return new DImValue(type, arg);
-            } else if (global.params.cpu == ARCHx86_64) {
+            } else if (global.params.targetTriple.getArch() == llvm::Triple::x86_64) {
                 LLValue *va_list = DtoAlloca(exp->type->nextOf());
                 DtoStore(va_list, arg);
                 va_list = DtoBitCast(va_list, getVoidPtrType());
@@ -954,7 +954,8 @@ DValue* CallExp::toElem(IRState* p)
             }
         }
 #if DMDV2
-        else if (fndecl->llvmInternal == LLVMva_copy && global.params.cpu == ARCHx86_64) {
+        else if (fndecl->llvmInternal == LLVMva_copy &&
+            global.params.targetTriple.getArch() == llvm::Triple::x86_64) {
             if (arguments->dim != 2) {
                 error("va_copy instruction expects 2 arguments");
                 return NULL;

gen/typinf.cpp

@@ -719,8 +719,8 @@ void TypeInfoStructDeclaration::llvmDefine()
     // On x86_64, class TypeInfo_Struct contains 2 additional fields
     // (m_arg1/m_arg2) which are used for the X86_64 System V ABI varargs 
     // implementation. They are not present on any other cpu/os.
-    assert((global.params.cpu != ARCHx86_64 && tscd->fields.dim == 11) ||
+    assert((global.params.targetTriple.getArch() != llvm::Triple::x86_64 && tscd->fields.dim == 11) ||
-           (global.params.cpu == ARCHx86_64 && tscd->fields.dim == 13));
+           (global.params.targetTriple.getArch() == llvm::Triple::x86_64 && tscd->fields.dim == 13));
 
     //void function(void*)                    xdtor;
     b.push_funcptr(sd->dtor);

ir/irtype.cpp

@@ -68,6 +68,9 @@ llvm::Type * IrTypeBasic::basic2llvm(Type* t)
     LLType* t2;
 
     llvm::LLVMContext& ctx = llvm::getGlobalContext();
+    llvm::Triple::ArchType const a = global.params.targetTriple.getArch();
+    bool const anyX86 = (a == llvm::Triple::x86) || (a == llvm::Triple::x86_64);
+    bool const anyPPC = (a == llvm::Triple::ppc) || (a == llvm::Triple::ppc64);
 
     switch(t->ty)
     {
@@ -110,10 +113,10 @@ llvm::Type * IrTypeBasic::basic2llvm(Type* t)
     case Tfloat80:
     case Timaginary80:
         // only x86 has 80bit float
-        if (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
+        if (anyX86)
             return llvm::Type::getX86_FP80Ty(ctx);
         // PPC has a special 128bit float
-        else if (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
+        else if (anyPPC)
             return llvm::Type::getPPC_FP128Ty(ctx);
         // other platforms use 64bit reals
         else
@@ -129,11 +132,8 @@ llvm::Type * IrTypeBasic::basic2llvm(Type* t)
         return getComplexType(ctx, t2);
 
     case Tcomplex80:
-        t2 = (global.params.cpu == ARCHx86 || global.params.cpu == ARCHx86_64)
+        t2 = anyX86 ? llvm::Type::getX86_FP80Ty(ctx)
-            ? llvm::Type::getX86_FP80Ty(ctx)
+            : (anyPPC ? llvm::Type::getPPC_FP128Ty(ctx) : llvm::Type::getDoubleTy(ctx));
-            : (global.params.cpu == ARCHppc || global.params.cpu == ARCHppc_64)
-              ? llvm::Type::getPPC_FP128Ty(ctx)
-              : llvm::Type::getDoubleTy(ctx);
         return getComplexType(ctx, t2);
 
     case Tbool: