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detail optimize switch compares (#21163)
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1 changed files with 18 additions and 8 deletions
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@ -1598,18 +1598,28 @@ struct CaseVal
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* Generate comparison of [reg2,reg] with val
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* Generate comparison of [reg2,reg] with val
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*/
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*/
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@trusted
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@trusted
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private void cmpval(CGstate cg, ref CodeBuilder cdb, targ_llong val, uint sz, reg_t reg, reg_t reg2, reg_t sreg)
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private void cmpval(CGstate cg, ref CodeBuilder cdb, ulong val, uint sz, reg_t reg, reg_t reg2, reg_t sreg)
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{
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{
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if (cg.AArch64)
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if (cg.AArch64)
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{
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{
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// TODO AArch64 use CMP https://www.scs.stanford.edu/~zyedidia/arm64/cmp_subs_addsub_imm.html
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assert(sreg == NOREG);
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assert(sreg == NOREG);
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regm_t retregs = cg.allregs & ~mask(reg);
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if (val <= 0xFFF || val >= 0x1000 && val <= 0xFFF000)
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sreg = allocreg(cdb,retregs,TYint);
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{
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movregconst(cdb,sreg,val,sz == 8 ? 64 : 0);
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ubyte sh = val >= 0x1000;
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getregsNoSave(retregs);
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uint imm12 = cast(uint)(sh ? val >> 12 : val);
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assert(reg2 == NOREG);
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assert((imm12 & ~0xFFF) == 0);
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cdb.gen1(INSTR.cmp_shift(sz == 8, reg, 0, 0, sreg)); // CMP sreg,reg
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// https://www.scs.stanford.edu/~zyedidia/arm64/cmp_subs_addsub_imm.html
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cdb.gen1(INSTR.cmp_imm(sz == 8, sh, imm12, reg)); // CMP reg,#imm12{, shift}
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}
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else
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{
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regm_t retregs = cg.allregs & ~mask(reg);
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sreg = allocreg(cdb,retregs,TYint);
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movregconst(cdb,sreg,val,sz == 8 ? 64 : 0);
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getregsNoSave(retregs);
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assert(reg2 == NOREG);
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cdb.gen1(INSTR.cmp_shift(sz == 8, reg, 0, 0, sreg)); // CMP sreg,reg
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}
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}
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}
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else if (I64 && sz == 8)
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else if (I64 && sz == 8)
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{
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{
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