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add loads of floating point constants
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parent
b5e0bee399
commit
56f35fd4df
5 changed files with 57 additions and 7 deletions
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@ -37,6 +37,7 @@ import dmd.backend.ty;
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import dmd.backend.type;
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import dmd.backend.arm.cod3 : COND, genBranch, conditionCode, gentstreg;
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import dmd.backend.arm.instr;
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import dmd.backend.arm.cod3 : loadFloatRegConst;
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import dmd.backend.x86.cod1 : cdisscaledindex, ssindex_array;
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import dmd.backend.cg : segfl, stackfl;
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@ -2172,8 +2173,6 @@ private void movParams(ref CodeBuilder cdb, elem* e, uint stackalign, uint funca
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*/
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@trusted
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void loaddata(ref CodeBuilder cdb, elem* e, ref regm_t outretregs)
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{
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static if (1)
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{
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reg_t reg;
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reg_t nreg;
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@ -2216,7 +2215,7 @@ static if (1)
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forregs = outretregs & (cgstate.allregs | INSTR.FLOATREGS); // XMMREGS ?
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if (e.Eoper == OPconst)
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{
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if (tyvector(tym) && forregs & XMMREGS)
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if (0 && tyvector(tym) && forregs & XMMREGS) // TODO
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{
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assert(!flags);
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const xreg = allocreg(cdb, forregs, tym); // allocate registers
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@ -2225,6 +2224,16 @@ static if (1)
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return;
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}
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if (tyfloating(tym))
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{
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const vreg = allocreg(cdb, forregs, tym); // allocate floating point register
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float value = e.Vfloat;
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if (sz == 8)
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value = e.Vdouble;
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loadFloatRegConst(cdb,vreg,value,sz);
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return;
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}
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targ_size_t value = e.Vint;
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if (sz == 8)
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value = cast(targ_size_t)e.Vullong;
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@ -2414,4 +2423,3 @@ static if (1)
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return;
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}
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}
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}
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@ -30,6 +30,7 @@ import dmd.backend.cc;
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import dmd.backend.cdef;
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import dmd.backend.cgcse;
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import dmd.backend.code;
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import dmd.backend.arm.disasmarm : encodeHFD;
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import dmd.backend.x86.cgcod : disassemble;
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import dmd.backend.x86.code_x86;
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import dmd.backend.x86.cod3;
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@ -218,7 +219,6 @@ COND conditionCode(elem* e)
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// genmovreg
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// genmulimm
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// genshift
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// movregconst
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/**************************
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* Generate a jump instruction.
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@ -695,6 +695,45 @@ void genmovreg(ref CodeBuilder cdb, reg_t to, reg_t from, tym_t ty = TYMAX)
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}
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}
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/*************************************
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* Load constant floating point value into vreg.
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* Params:
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* cdb = code sink for generated output
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* vreg = target floating point register
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* value = value to move into register
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* sz = 4 for float, 8 for double
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*/
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@trusted
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void loadFloatRegConst(ref CodeBuilder cdb, reg_t vreg, double value, uint sz)
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{
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assert(vreg & 32);
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ubyte imm8;
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if (encodeHFD(value, imm8))
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{
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uint ftype = INSTR.szToFtype(sz);
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cdb.gen1(INSTR.fmov_float_imm(ftype,imm8,vreg)); // FMOV <Vd>,#<imm8>
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}
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else if (sz == 4)
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{
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float f = value;
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uint i = *cast(uint*)&f;
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regm_t retregs = ALLREGS; // TODO cg.allregs?
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reg_t reg = allocreg(cdb, retregs, TYfloat);
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movregconst(cdb,reg,i,0); // MOV reg,i
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cdb.gen1(INSTR.fmov_float_gen(0,0,0,7,reg,vreg)); // FMOV Sd,Wn
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}
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else if (sz == 8)
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{
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ulong i = *cast(ulong*)&value;
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regm_t retregs = ALLREGS; // TODO cg.allregs?
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reg_t reg = allocreg(cdb, retregs, TYdouble);
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movregconst(cdb,reg,i,64); // MOV reg,i
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cdb.gen1(INSTR.fmov_float_gen(1,1,0,7,reg,vreg)); // FMOV Dd,Xn
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}
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else
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assert(0);
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//cgstate.regimmed_set(vreg,value); // TODO
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}
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/******************************
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* Move constant value into reg.
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@ -846,7 +885,7 @@ void movregconst(ref CodeBuilder cdb,reg_t reg,targ_size_t value,regm_t flags)
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done:
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if (flags & mPSW)
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gentstreg(cdb,reg,(flags & 64) != 0);
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printf("set reg %d to %lld\n", reg, value);
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//printf("set reg %d to %lld\n", reg, value);
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cgstate.regimmed_set(reg,value);
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}
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@ -2760,6 +2760,7 @@ unittest
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* Returns:
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* true for success
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*/
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public
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bool encodeHFD(double d, out ubyte imm8)
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{
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float f = d;
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@ -100,7 +100,8 @@ void out_config_init(
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}
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cfg.fulltypes = CVNONE;
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cfg.fpxmmregs = false;
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cfg.inline8087 = 1;
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if (!arm)
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cfg.inline8087 = 1;
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cfg.memmodel = 0;
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cfg.flags |= CFGuchar; // make sure TYchar is unsigned
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cfg.exe = exefmt;
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@ -1147,6 +1147,7 @@ int el_countCommas(const(elem)* e)
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@trusted
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elem* el_convfloat(ref GlobalOptimizer go, elem* e)
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{
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//printf("el_convfloat()\n"); elem_print(e);
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ubyte[32] buffer = void;
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assert(config.inline8087);
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