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Revert "drop support for pre pentium pro cpus (#16430)" (#16440)

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This reverts commit fd74df2c8a.
This commit is contained in:
Walter Bright 2024-05-07 19:16:28 -07:00 • committed by GitHub
parent 1feae96be0
commit 2f2f6508aa
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1 changed files with 35 additions and 14 deletions
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49
compiler/src/dmd/backend/cod1.d
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@ -2806,7 +2806,7 @@ void callclib(ref CodeBuilder cdb, elem* e, uint clib, regm_t* pretregs, regm_t
for (int i = 0; i < cinfo.pop87; i++) for (int i = 0; i < cinfo.pop87; i++)
pop87(); pop87();
if (clib == CLIB.lmul && !I32) if (config.target_cpu >= TARGET_80386 && clib == CLIB.lmul && !I32)
{ {
static immutable ubyte[23] lmul = static immutable ubyte[23] lmul =
[ [
@ -4020,7 +4020,7 @@ static if (0)
// the stack walker evaluates the return address, not a byte of the // the stack walker evaluates the return address, not a byte of the
// call instruction, so ensure there is an instruction byte after // call instruction, so ensure there is an instruction byte after
// the call that still has the same line number information // the call that still has the same line number information
cdb.gen1(UD2); cdb.gen1(config.target_cpu >= TARGET_80286 ? UD2 : INT3);
} }
/* Function never returns, so don't need to generate stack /* Function never returns, so don't need to generate stack
* cleanup code. But still need to log the stack cleanup * cleanup code. But still need to log the stack cleanup
@ -4446,7 +4446,7 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
pushsize = 2; pushsize = 2;
op16 = 1; op16 = 1;
} }
else if (I16 && (sz & 3) == 0) else if (I16 && config.target_cpu >= TARGET_80386 && (sz & 3) == 0)
{ {
pushsize = 4; // push DWORDs at a time pushsize = 4; // push DWORDs at a time
op16 = 1; op16 = 1;
@ -4617,6 +4617,14 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
if (sz == REGSIZE) if (sz == REGSIZE)
goto case OPvar; // handle it with loadea() goto case OPvar; // handle it with loadea()
// Avoid PUSH MEM on the Pentium when optimizing for speed
if (config.flags4 & CFG4speed &&
(config.target_cpu >= TARGET_80486 &&
config.target_cpu <= TARGET_PentiumMMX) &&
sz <= 2 * REGSIZE &&
!tyfloating(tym))
break;
if (tym == TYldouble || tym == TYildouble || tycomplex(tym)) if (tym == TYldouble || tym == TYildouble || tycomplex(tym))
break; break;
@ -4719,7 +4727,7 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
(((fl == FLfunc || s.ty() & mTYcs) ? 1 : segfl[fl]) << 3)); (((fl == FLfunc || s.ty() & mTYcs) ? 1 : segfl[fl]) << 3));
cdb.genadjesp(REGSIZE); cdb.genadjesp(REGSIZE);
if (!e.Ecount) if (config.target_cpu >= TARGET_80286 && !e.Ecount)
{ {
getoffset(cdb, e, STACK); getoffset(cdb, e, STACK);
freenode(e); freenode(e);
@ -4735,7 +4743,7 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
} }
return; return;
} }
if (!e.Ecount) if (config.target_cpu >= TARGET_80286 && !e.Ecount)
{ {
stackpush += sz; stackpush += sz;
if (_tysize[tym] == tysize(TYfptr)) if (_tysize[tym] == tysize(TYfptr))
@ -4754,13 +4762,21 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
case OPvar: case OPvar:
L1: L1:
if (movOnly(e) || (tyxmmreg(tym) && config.fpxmmregs) || tyvector(tym)) if (config.flags4 & CFG4speed &&
(config.target_cpu >= TARGET_80486 &&
config.target_cpu <= TARGET_PentiumMMX) &&
sz <= 2 * REGSIZE &&
!tyfloating(tym))
{ // Avoid PUSH MEM on the Pentium when optimizing for speed
break;
}
else if (movOnly(e) || (tyxmmreg(tym) && config.fpxmmregs) || tyvector(tym))
break; // no PUSH MEM break; // no PUSH MEM
else else
{ {
int regsize = REGSIZE; int regsize = REGSIZE;
uint flag = 0; uint flag = 0;
if (I16 && sz > 2 && if (I16 && config.target_cpu >= TARGET_80386 && sz > 2 &&
!e.Ecount) !e.Ecount)
{ {
regsize = 4; regsize = 4;
@ -4820,13 +4836,18 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
if (!I16 && i == 2) if (!I16 && i == 2)
flag = CFopsize; flag = CFopsize;
if (config.target_cpu >= TARGET_80286)
pushi = 1; // && (e.Ecount == 0 || e.Ecount != e.Ecomsub))
if (I16 && i >= 4)
{ {
regsize = 4; pushi = 1;
flag = CFopsize; if (I16 && config.target_cpu >= TARGET_80386 && i >= 4)
{
regsize = 4;
flag = CFopsize;
}
} }
else if (i == REGSIZE)
break;
stackpush += sz; stackpush += sz;
cdb.genadjesp(cast(int)sz); cdb.genadjesp(cast(int)sz);
@ -5420,7 +5441,7 @@ void loaddata(ref CodeBuilder cdb, elem* e, ref regm_t outretregs)
assert(forregs & BYTEREGS); assert(forregs & BYTEREGS);
if (!I16) if (!I16)
{ {
if (config.flags4 & CFG4speed && if (config.target_cpu >= TARGET_PentiumPro && config.flags4 & CFG4speed &&
// Workaround for OSX linker bug: // Workaround for OSX linker bug:
// ld: GOT load reloc does not point to a movq instruction in test42 for x86_64 // ld: GOT load reloc does not point to a movq instruction in test42 for x86_64
!(config.exe & EX_OSX64 && !(sytab[e.EV.Vsym.Sclass] & SCSS)) !(config.exe & EX_OSX64 && !(sytab[e.EV.Vsym.Sclass] & SCSS))
@ -5465,7 +5486,7 @@ void loaddata(ref CodeBuilder cdb, elem* e, ref regm_t outretregs)
else if (sz <= REGSIZE) else if (sz <= REGSIZE)
{ {
opcode_t opmv = 0x8B; // MOV reg,data opcode_t opmv = 0x8B; // MOV reg,data
if (sz == 2 && !I16 && if (sz == 2 && !I16 && config.target_cpu >= TARGET_PentiumPro &&
// Workaround for OSX linker bug: // Workaround for OSX linker bug:
// ld: GOT load reloc does not point to a movq instruction in test42 for x86_64 // ld: GOT load reloc does not point to a movq instruction in test42 for x86_64
!(config.exe & EX_OSX64 && !(sytab[e.EV.Vsym.Sclass] & SCSS)) !(config.exe & EX_OSX64 && !(sytab[e.EV.Vsym.Sclass] & SCSS))