Update dmd to latest version (02d6d07a69280f8cc88380a682717bb67ca485fb) & fix checks using parens (#90)

* Update dmd module

* Fix checks using Expreesion.parens

* Update windows build
This commit is contained in:
Vladiwostok 2024-03-05 10:46:04 +02:00 committed by Vladiwostok
parent 24f7754fef
commit 860ddf1994
6 changed files with 20 additions and 35 deletions

View file

@ -35,9 +35,7 @@ set DMD_FRONTEND_DENYLIST=^
dmd\compiler\src\dmd\e2ir.d^
dmd\compiler\src\dmd\eh.d^
dmd\compiler\src\dmd\glue.d^
dmd\compiler\src\dmd\iasm.d^
dmd\compiler\src\dmd\iasmdmd.d^
dmd\compiler\src\dmd\iasmgcc.d^
dmd\compiler\src\dmd\irstate.d^
dmd\compiler\src\dmd\lib.d^
dmd\compiler\src\dmd\libelf.d^

2
dmd

@ -1 +1 @@
Subproject commit 85481894447684c107347e21d405f8f6b34b2369
Subproject commit 02d6d07a69280f8cc88380a682717bb67ca485fb

View file

@ -18,7 +18,7 @@
"libddoc": "~>0.8.0",
"dmd": {
"repository": "git+https://github.com/dlang/dmd.git",
"version": "85481894447684c107347e21d405f8f6b34b2369"
"version": "02d6d07a69280f8cc88380a682717bb67ca485fb"
}
},
"targetPath" : "bin",

View file

@ -20,9 +20,7 @@ DMD_FRONTEND_SRC := \
! -name "e2ir.d" \
! -name "eh.d" \
! -name "glue.d" \
! -name "iasm.d" \
! -name "iasmdmd.d" \
! -name "iasmgcc.d" \
! -name "irstate.d" \
! -name "lib.d" \
! -name "libelf.d" \

View file

@ -44,24 +44,20 @@ extern(C++) class LogicPrecedenceCheck(AST) : BaseAnalyzerDmd
if (!left && !right)
goto END;
// TODO: fix
//if ((left && left.parens) || (right && right.parens))
//goto END;
if ((left && left.parens) || (right && right.parens))
goto END;
if ((left !is null && left.e2 is null) && (right !is null && right.e2 is null))
goto END;
// TODO: fixme
//addErrorMessage(cast(ulong) le.loc.linnum, cast(ulong) le.loc.charnum, KEY,
//"Use parenthesis to clarify this expression.");
addErrorMessage(cast(ulong) le.loc.linnum, cast(ulong) le.loc.charnum,
KEY, "Use parenthesis to clarify this expression.");
END:
super.visit(le);
}
}
/*
TODO: fixme
unittest
{
import dscanner.analysis.config : StaticAnalysisConfig, Check, disabledConfig;
@ -80,4 +76,3 @@ unittest
}c, sac);
stderr.writeln("Unittest for LogicPrecedenceCheck passed.");
}
*/

View file

@ -7,7 +7,6 @@ module dscanner.analysis.redundant_parens;
import dscanner.analysis.base;
// TODO: check and fix
/**
* Checks for redundant parenthesis
*/
@ -24,9 +23,8 @@ extern(C++) class RedundantParenCheck(AST) : BaseAnalyzerDmd
override void visit(AST.IfStatement s)
{
//if (s.condition.parens)
//addErrorMessage(cast(ulong) s.loc.linnum, cast(ulong) s.loc.charnum,
//KEY, MESSAGE);
if (s.condition.parens)
addErrorMessage(cast(ulong) s.loc.linnum, cast(ulong) s.loc.charnum, KEY, MESSAGE);
}
private:
@ -34,18 +32,16 @@ private:
enum string MESSAGE = "Redundant parenthesis.";
}
/*
TODO: check and fix
unittest
{
import dscanner.analysis.config : StaticAnalysisConfig, Check, disabledConfig;
import dscanner.analysis.helpers : assertAnalyzerWarningsDMD;
import std.stdio : stderr;
import dscanner.analysis.helpers : assertAnalyzerWarnings = assertAnalyzerWarningsDMD;
StaticAnalysisConfig sac = disabledConfig();
sac.redundant_parens_check = Check.enabled;
assertAnalyzerWarnings(q{
assertAnalyzerWarningsDMD(q{
void testRedundantParens()
{
int a = 0;
@ -68,6 +64,4 @@ unittest
}c, sac);
stderr.writeln("Unittest for RedundantParenthesis passed.");
}
*/